eZX Spectrum — Expansion

Applies to the eZX primary FPGA image. The eZX provides three user-installable expansion mechanisms, all optional — the eZX boots and runs without any of them fitted. This document is the unified overview; the per-expansion technical detail lives in the linked sections of spec and on ant64.com where the interface is Ant64-shared.

There is no separate accelerator expansion. DeMon's own compute module (CM4 lite by default, user-upgradeable to CM5 lite) is a full Linux-class ARM host in its own right — the role a Pi Zero 2W accelerator would have played is already covered by DeMon itself.

Summary

The eZX as shipped is the base configuration: BSRAM + HyperRAM, no DDR3, no MIDI daughter-board, no SRAM daughter-board. Every expansion is opt-in. DeMon's compute module swap (CM4 lite → CM5 lite, for more RAM and faster compute) is not an expansion in this sense — it's a supervisor hardware upgrade, covered in spec § Hardware Summary, not a connector-based add-on.

SRAM expansion

The SRAM expansion is a deliberately-exposed connector carrying the FPGA's freed LVDS lanes, designed to accept an optional 36-bit-wide parallel SRAM daughter-board. When installed, the SRAM bank brings the eZX to architectural parity with the Ant64's wide-SRAM memory tier; uninstalled (the default), the eZX runs on its BSRAM + HyperRAM + optional DDR3 tier hierarchy without the wide-SRAM bank.

Why it's an expansion rather than built-in

The eZX FPGA pin budget is sufficient to host the 36-bit parallel SRAM bank directly on the main board — once the HS USB return path replaced the LT9211 LVDS-to-MIPI-CSI bridges, the LVDS TX pins that had been consumed by those bridges became available. The eZX deliberately does not build the SRAM bank in by default, because doing so would make the eZX architecturally almost identical to the Ant64 and erase the distinction between the two machines. Instead, the freed pins are routed to the SRAM expansion connector — letting users who want Ant64-class wide-SRAM capability install an SRAM daughter-board, while keeping the stock eZX a Spectrum-focused machine.

What an SRAM daughter-board would provide

A 36-bit-wide parallel SRAM bank — same width and same electrical contract as Ant64's on-board SRAM tier — would deliver the wide-mode memory benefits Anthony's Xwide extension carries on Ant64 over an additional, low-latency memory tier independent of DDR3. FPGA images that detect the SRAM at boot can use it for the same workloads Ant64 uses its on-board SRAM for: latency-critical hot kernels, audio DSP working sets that benefit from single-cycle access, real-time blitter feeders, and so on. The pin map, signal voltages, address-range mapping, and FPGA-side controller are intended to match Ant64's SRAM tier, so accelerator software targeting Ant64's wide-SRAM doesn't need eZX-specific changes once the daughter-board is fitted.

Status

The SRAM expansion connector is on the eZX board, exposing the freed LVDS pins. An SRAM daughter-board to plug into it is not currently shipped; the design slot is reserved for a future official board or community design. The base eZX runs without any board fitted, and the FPGA images released for the base machine make no use of SRAM-resident memory.

See spec § Why no parallel SRAM for the design-choice rationale.

DDR3 expansion

The DDR3 expansion is a standard 204-pin DDR3 SODIMM slot on the eZX board, accepting a user-installable DDR3 ECC SODIMM. The slot is optional; the eZX boots and runs without a SODIMM fitted in its base configuration, including the eZX primary image, which runs "compatibility-mode" titles without DDR3. Fitting a SODIMM unlocks "expanded" eZX primary titles and automatically gives compatibility-mode titles more asset room and faster code — see spec § Compatibility-mode and expanded software.

What it adds

A 72-bit-wide DDR3 ECC SODIMM at DDR3-800 (the GW5AST-LV138's maximum supported DDR3 data rate). The eZX prefers a 1R x8 (single-rank, 9-chip) SODIMM for full advertised capacity; 2R x8 (18-chip dual-rank) SODIMMs also fit and work but only the first rank is reachable (FPGA controller IP drives only one CS), so half the labelled capacity is usable on a 2R module. Standard JEDEC 204-pin DDR3 ECC SODIMMs in 1, 2, and 4 GB labelled capacities are software-supported at 1 / 2 / 4 GB of user-addressable data respectively (1R) or 0.5 / 1 / 2 GB (2R, first-rank-only). The eZX reserves 8 GB of address space for the DDR3 region in its memory map — the theoretical ceiling for a single-rank DDR3 ECC SODIMM at JEDEC's 8 Gbit chip-density maximum. Today the supported capacities are 1, 2, and 4 GB.

All 72 bits are used as RAM, not as 64-bit data plus 8-bit parity. The eZX's DDR3 controller does no ECC calculation; the 9th chip's 8 bits per word are real RAM storage, not Hamming-code syndromes. The 8 extra bits per 72-bit word are repurposed at the logical level rather than used for ECC: for CPU data accesses they are per-byte debugger watch bits (1 watch bit per data byte), and for CPU instruction fetches they are wide-mode extension nibbles (2 × 4-bit per pair of 36-bit instruction slots). The FPGA chipset hardware (audio mixer, blitter, composer, display scanout) sees the full 72-bit word as flat data with no metadata interpretation, giving the chipset full 7.2 GB/s peak bandwidth.

Constraints

• 1R x8 organisation preferred. The standard ECC SODIMM organisation — single-rank, x8 chip width, 9 chips total — gives full advertised capacity on the current FPGA controller IP
• 2R x8 / 18-chip dual-rank modules also fit and work, with the first rank only. Both chip-select lines are wired on the board, but the FPGA controller IP drives only one CS, so only the first rank is reachable. A dual-rank module presents at half its labelled capacity. AntOS reads the JEDEC SPD at boot and warns if a dual-rank module is detected
• ECC SODIMMs required. The 72-bit-wide bus organisation depends on the 8 extra bits per word being physically present in the module (the 9th chip carrying them). Non-ECC 64-bit SODIMMs will not work
• x8 chip width required. The controller is configured for x8 chips; x4 organisations (rare in SODIMMs, more common in registered DIMMs) are not supported
• DDR3-1600 or faster underclocked to DDR3-800 is the recommended sourcing pattern — these modules are widely available in the workstation, refurbished-server, and prosumer-laptop channels, and the underclocking-for-better-timing story gives same-or-better absolute timing than native DDR3-800 silicon

What it enables

The DDR3 expansion is required for the eZX primary showcase image (the chipset's composer texture pool, blitter source/destination indirection, 1080p scanout bandwidth, audio sample banks at full quality). It also enables wide mode for the EE — the eZX CPU is the same FireStorm EE the Ant64 runs, and wide mode is available wherever wide-tier memory (DDR3, or the SRAM expansion when fitted) is available, extending the register file to 64 GPRs / 64 FPRs, widening immediates from 12→14 bits and 20→23 bits, and adding predicated execution. See spec § DDR3 SODIMM details and EE for the full architecture.

Status

The DDR3 expansion is on the eZX board as the SODIMM slot. Users buy the SODIMM separately and install it themselves; the connector and routing layout follow JEDEC's DDR3 SODIMM standard so any compliant 72-bit ECC x8 module works (1R for full capacity, 2R for half capacity).

MIDI/audio expansion

The MIDI/audio expansion connector is mechanically and electrically identical to the Ant64 MIDI/audio expansion connector. MIDI/audio expansion boards — including the Ant64C-style DIN MIDI In/Out/Thru board and any analogue-audio variants — are physically interchangeable between eZX and Ant64.

What it adds

A daughter-board carrying:

• DIN MIDI In / Out / Thru — hardware MIDI ports for connecting external synthesizers, controllers, sequencers, and patch-panel gear. Carried over the same UART lines that DeMon's MIDI subsystem drives on the Ant64
• Analogue audio I/O — line-level In/Out for connecting external audio gear; the FPGA chipset's audio mixer (eZX primary image) and the Z80NG audio output (Classic / Next-compat images) feed Out; In is available for sampling into HyperRAM via DeMon
• Other Ant64-compatible interfaces the daughter-board carries

Software access

USB MIDI is supported by the eZX primary and Next-compatible images via DeMon's USB stack — without the MIDI/audio daughter-board, USB MIDI is the only way to connect external MIDI gear. The Classic Spectrum image has no native MIDI hardware to expose, so neither USB MIDI nor the daughter-board's DIN MIDI is available in that image. The daughter-board adds DIN MIDI to whichever images natively support MIDI (the eZX primary and Next-compatible images), and adds analogue audio I/O to all three.

Status

The MIDI/audio expansion connector is on the eZX board. The daughter-board is optional; users who don't need DIN MIDI or analogue audio I/O don't need to fit one. The Ant64C-style DIN MIDI In/Out/Thru board is the canonical daughter-board for the connector.

See spec § MIDI expansion for the connectivity detail and ant64.com for the Ant64 daughter-board documentation.

Combining expansions

All three expansions can be installed simultaneously without conflict — each uses its own pin set on the FPGA and its own board area:

A maxed-out eZX with all three expansions installed has the SRAM daughter-board adding the Ant64-class wide-SRAM tier, the DDR3 SODIMM providing GB-class storage with wide-mode CPU features and watch-bit debug visibility, and the MIDI/audio board adding DIN MIDI and analogue audio I/O — with DeMon's own compute module (CM4 lite, or CM5 lite if upgraded) providing the Linux-class compute that would once have needed a separate accelerator. The stock eZX with no expansions runs the Classic Spectrum and Next-compatible images at full speed — every expansion is genuinely optional.